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ADSP-21587

Dual-core SHARC+ DSP, dual DDR, 529-cspBGA

ADSP-21587产品信息:

概览

优势和特点

  • 500 MHz (3.0 GFLOPS) per core
  • 5Mbits/640KB L1 memory/core with parity
    • Optional cache/SRAM mode
  • 32-bit, 40-bit & 64-bit floating point support
Shared System Memory
  • 256KB L2 SRAM with ECC protection
Up to Two High Speed Memory Controllers
  • DDR3-900, DDR2-800 & LPDDR (16-bit)
Advanced Hardware Accelerators
  • FFT/iFFT (20 GFLOPS, 5usec per 1K-pt FFT)
  • FIR/IIR and SINC Filters, ASRC
  • Security Crypto Engines with OTP
Packaging
  • 19mm x 19mm BGA (0.8mm pitch)
  • Commercial, Industrial
  • Up to 8 Full SPORT interfaces (w/ TDM & I2S modes)
  • S/PDIF Tx/Rx, 8x ASRC pairs, PCG
  • 2x Dual-SPI and 1x QuadSPI (w/ direct execution)
  • 3x I(2)C and 3x UARTs (w/ Flow Control)
  • Enhanced Parallel Peripheral Interface
    • For video I/O or parallel converter interface
  • 2x Link Ports (bi-directional, 8-bit, up to 150MB/sec)
  • 3x Enhanced PWM, ADC Control Module (ACM)
  • 8x GP Timer, 1x GP Counter, WDT and RTC
  • Up to 102 GPIO (mux’ed w/ other interfaces)
  • 8-ch 12-bit 1MSPS Housekeeping ADC
  • Thermal Sensor

    产品详情

    The ADSP-21587 processor is part of the new, high-performance, power-efficient, real-time series that delivers greater than 24 giga-floating-point operations per second using two enhanced SHARC+ cores and advanced DSP accelerators (FFT, FIR, IIR). The ADSP-SC58x and ADSP-2158x series consume less than 2 watts, making the new processor line-up more than 5x more power efficient than previous SHARC products. This advantage provides industry leading digital signal processing performance for applications where thermal management sets the limit for power consumption, or where the higher costs and lower reliability of fans cannot be tolerated. Applications include automotive, consumer and professional audio, multi-axis motor control, and energy distribution systems.

    The ADSP-2158x family is designed for applications where a DSP co-processor is exclusively needed and includes two SHARC+ cores and a peripheral set matched to a DSP core.

    The new, code-compatible, enhanced SHARC+ core features clock-rate and power-efficiency improvements and adds instruction/data cache options, native double-precision floating-point support, and a number of other new instructions. Designed for low-power and using a low-leakage CMOS process, the ADSP-SC58x/2158x families deliver 500 MHz with 105°C environments in mind and provide a roadmap to future implementations at higher performance. More than 1.5 Mbytes of fast on-chip SRAM and up to two DDR3/2/LP interfaces aid efficient real-time performance while the memory subsystem includes major enhancements with advanced DMA engines for simultaneous data transfer.

    With software IP protection a growing industry security concern, ARM TrustZone security and an onboard crypto hardware accelerators are included. For applications where reliability is a critical requirement, memory parity and error-correction hardware provide higher data integrity. The overall integration and low-power features offered by the new ADSP-SC58x and ADSP-2158x series deliver significant BOM and board area savings and provide lower design complexity and reduced time to market for today’s complex applications.

    The ADSP-SC58x/2158x is supported by ADI’s award winning Crosscore Embedded Studio development tool suite, providing design engineers with interactive, real-time development tools that help optimize their design and speed time to market.

    Additionally, ADI and Micrium have collaborated to offer µC/OS-II & µC/OS-III real-time kernels on SHARC+.

    The compatible ADSP-SC589 EZ-KIT-Lite development board and ICE-1000/2000 emulators facilitate the creation, test, and debug of advanced applications. Working in tandem with CrossCore Embedded Studio, the emulators provide state-of-the-art support for all JTAG-compliant Devices processors now utilizing CoreSight from ARM.

    ADSP-21587数据手册:

    ADSP-21587引脚功能、电路图:

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